Priority based round robin (PBRR) CPU scheduling algorithm

This paper introduce a new approach for scheduling algorithms which aim to improve real time operating system CPU performance. This new approach of CPU Scheduling algorithm is based on the combination of round-robin (RR) and Priority based (PB) scheduling algorithms. This solution maintains the advantage of simple round robin scheduling algorithm, which is reducing starvation and integrates the advantage of priority scheduling. The proposed algorithm implements the concept of time quantum and assigning as well priority index to the processes. Existing round robin CPU scheduling algorithm cannot be dedicated to real time operating system due to their large waiting time, large response time, large turnaround time and less throughput. This new algorithm improves all the drawbacks of round robin CPU scheduling algorithm. In addition, this paper presents analysis comparing proposed algorithm with existing round robin scheduling algorithm focusing on average waiting time and average turnaround time

Improved time quantum length estimation for round robin scheduling algorithm using neural network

In most cases, the quantum time length is taken to be fix in all applications that use Round Robin (RR) scheduling algorithm. Many attempts aim to determination of the optimal length of the quantum that results in a small average turnaround time, but the unknown nature of the tasks in the ready queue make the problem more complicated: Considering a large quantum length makes the RR algorithm behave like a First Come First Served (FIFO) scheduling algorithm, and a small quantum length cause high number of contexts switching. In this paper we propose a RR scheduling algorithm based on Neural Network Models for predicting the optimal quantum length which lead to a minimum average turnaround time. The quantum length depends on tasks burst times available in the ready queue. Rather than conventional traditional methods using fixed quantum length, this one giving better results by minimizing the average turnaround time for almost any set of jobs in the ready queue

La synthèse de haut niveau d'un modem digital intelligent

Le papier discute l'intégration des applications complexes dans des circuits à partir des spécifications de haut niveau. Il s'agit de la conception d'un MODEM digital intelligent utilisant la synthèse de haut niveau. Le flot de conception adopté permet, à partir des spécifications de haut niveau indépendantes de la technologie, l'étude de plusieurs alternatives de réalisations, le choix rapide des solutions, la réduction des erreurs pendant les premières phases de la conception et de la réutilisation des modules déjà synthétisés ou existants. Le temps de conception est réduit par l'automatisation des différentes phases de conception en utilisant le même langage de description (VHDL) à tous les niveaux

Design of 4-Bit 4-Tap FIR Filter Based on Quantum-Dot Cellular Automata (QCA) Technology with a Realistic Clocking Scheme

The increasing demand for efficient signal processors necessitates the design of digital finite duration impulse response FIR filter which occupies less area and consumes less power. FIR filters have simple, regular and scalable structures. This paper represents designing and implementation of a low-power 4-tap FIR filter based on quantum-dot cellular automata (QCA) by using a realistic clocking scheme. The QCADesigner software, as widely used in QCA circuit design and verification, has been used to implement and to verify all of the designs in this study. Power dissipation result has been computed for the proposed circuit using accurate QCADesigner-E software. The proposed QCA FIR achieves about 97.74% reduction in power compared to previous existing designs. The outcome of this work can clearly open up a new window of opportunity for low-power signal processing system

Combining Haar Wavelet and Karhunen Loeve Transforms for Medical Images Watermarking

International audienceThis paper presents a novel watermarking method, applied to the medical imaging domain, used to embed the patient's data into the corresponding image or set of images used for the diagnosis. The main objective behind the proposed technique is to perform the watermarking of the medical images in such a way that the three main attributes of the hidden information (i.e. imperceptibility, robustness, and integration rate) can be jointly ameliorated as much as possible. These attributes determine the effectiveness of the watermark, resistance to external attacks and increase the integration rate. In order to improve the robustness, a combination of the characteristics of Discrete Wavelet and Karhunen Loeve Transforms is proposed. The Karhunen Loeve Transform is applied on the sub-blocks (sized 8x8) of the different wavelet coefficients (in the HL2, LH2 and HH2 subbands). In this manner, the watermark will be adapted according to the energy values of each of the Karhunen Loeve components, with the aim of ensuring a better watermark extraction under various types of attacks. For the correct identification of inserted data, the use of an Errors Correcting Code (ECC) mechanism is required for the check and, if possible, the correction of errors introduced into the inserted data. Concerning the enhancement of the imperceptibility factor, the main goal is to determine the optimal value of the visibility factor, which depends on several parameters of the DWT and the KLT transforms. As a first step, a Fuzzy Inference System (FIS) has been set up and then applied to determine an initial visibility factor value. Several features extracted from the Co-Occurrence matrix are used as an input to the FIS and used to determine an initial visibility factor for each block; these values are subsequently re-weighted in function of the eigenvalues extracted from each sub-block. Regarding the integration rate, the previous works insert one bit per coefficient. In our proposal, the integration of the data to be hidden is 3 bits per coefficient so that we increase the integration rate by a factor of magnitude 3

Future Internet of Things: Connecting the Unconnected World and Things Based on 5/6G Networks and Embedded Technologies

Undeniably, the Internet of Things (IoT) ecosystem keeps on advancing at a fast speed, far above all predictions for growth and ubiquity. From sensor to cloud, this massive network continues to break technical limits in a variety of ways, and wireless sensor nodes are likely to become more prevalent as the number of Internet of Things devices increases into the trillions to connect the world and unconnected objects. However, their future in the IoT ecosystem remains uncertain, as various difficulties as with device connectivity, edge artificial intelligence (AI), security and privacy concerns, increased energy demands, the right technologies to use, and continue to attract opposite forces. This chapter provides a brief, forward-looking overview of recent trends, difficulties, and cutting-edge solutions for low-end IoT devices that use reconfigurable computing technologies like FPGA SoC and next-generation 5/6G networks. Tomorrow’s IoT devices will play a critical role. At the end of this chapter, an edge FPGA SoC computing-based IoT application is proposed, to be a novel edge computing for IoT solution with low power consumption and accelerated processing capability in data exchange